fscajtag version 26040900
Tool to program a bit-file into a Xilinx 7-Series FPGA connected to the JTAG port
of a GBT-SCA, connected to any FLX-device GBT (2-bit HDLC) E-link.
The FPGA may be part of a JTAG chain containing multiple devices;
the tool has options to take this into account.
If a bit-file name is not provided the ID-code and Status register
of the FPGA are read out and displayed.
Usage:
 fscajtag -h|V -E -d<devnr> -D<dma> -e<elink> -G<lnk> -g<group> -p<path>
          -c -R<rate> -s -Z
          -x<devs> -X<ibits> -y<devs> -Y<ibits> -z<instr>
          [<filename>]
  -h         : Show this help text.
  -V         : Show version.
  -c         : Use single-shot FromHost DMA (default: continuous).
  -d <devnr> : FLX-device to use (default: 0).
  -D <dma>   : DMA controller number for receiving (default: 0).
  -E         : Enable debug mode: display all GBT-SCA replies.
  -e <elink> : E-link number (hex) or use -G/g/p options.
  -G <lnk>   : GBT-link number.
  -g <group> : Group number (default: 7=EC).
  -p <path>  : E-path number (default: 7=EC).
  -R <rate>  : JTAG clock rate, in MHz, 1,2,4,5,10 or 20 (default: 20).
  -s         : Display FPGA Configuration register bits.
  -Z         : Do NOT receive and process/display GBT-SCA replies.
  -x <devs>  : Number of devices preceding the FPGA in the JTAG chain.
  -X <ibits> : Total number of preceding BYPASS instruction bits, or
               (with option -z) the number of instruction bits per device.
  -y <devs>  : Number of devices trailing the FPGA in the JTAG chain.
  -Y <ibits> : Total number of trailing BYPASS instruction bits, or
               (with option -z) the number of instruction bits per device.
  -z <instr> : The BYPASS instruction value for each of the preceding
               and trailing devices (when unequal to only '1'-bits).
 <filename>  : Name of .bit file containing the FPGA configuration.
